Book excerpt: Silicon-based integrated circuits used in the wireless technology have a great impact on our world. Moreover, such trend is continuing with ever-decreasing size of transistors. High speed wireless communication links are expected to become popular within most mobile devices in the next few years. On the other side, millimeter-wave (MMW) frequency has always been the terrain dominated by III-V compound semiconductor technology. However, the cost and low manufacturing yield of such systems prevent its commercialized use for new exciting applications, such as automotive intelligent system and imaging for public security and medical application. As the technology scaling in silicon, the increasing process ft and higher level of integration are promising to build lower cost, smaller sized MMW systems. This dissertation is following the goal to design and implement several prototype silicon-based integrated circuits at different technology nodes to address the key challenges faced by silicon both in circuit- and system-levels, therefore pave the path towards the fully-integrated systems for those emerging applications. A carrier-less RF-correlation-based impulse radio ultra-wideband (IR-UWB) transceiver front-end designed in 130nm CMOS process is presented. Timing synchronization and coherent demodulation are implemented directly in the RF domain. In order to solve the extremely large dynamic requirement of delay for RF synchronization, a template-based delay generation scheme is proposed and a 25ps timing resolution is achieved with a delay range of 500ps by a two-step timing synchronizer. The TRX achieves a maximum data rate of 2Gbps, while requiring only 51.5pJ/pulse in the TX mode and 72.9pJ/pulse in the RX mode. Finally a W-band receiver chipset for passive millimeter-wave imaging in a 65-nm standard CMOS technology is presented. The receiver design addresses the high 1/f noise issue in the advanced CMOS technology. An LO generation scheme is proposed to make it suitable for use in multi-pixel systems. In addition, the noise performance of the receiver is further improved by optimum biasing of transistors of the detector to achieve the highest responsivity and lowest NEP. The receiver chipset achieves a Dicke NETD of 0.52K, demonstrating the potential of CMOS for future low-cost portable passive imaging cameras.