Book excerpt: Today's analog and mixed-signal (AMS) layout flow requires long manual iterations and does not leverage computing resources for data-driven optimization. This issue is further compounded by the explosion of design rules and layout-dependent effects. We present an AMS layout generation flow that leverages digital place-and-route tools, amortizes setup cost with reusable primitives, and prunes layout candidates using time-efficient layout quality surrogates. We also analyze layout-dependent effects and parasitics and investigate unique challenges and mitigation strategies associated with using digital place-and-route tools for AMS circuits. These insights are validated with a generated 4x#x2; time-interleaved successive approximation analog-to-digital converter, a StrongARM comparator, and a voltage-controlled oscillator (VCO) in 16 nm FinFET CMOS. Silicon measurement results of the VCO closely track the simulation, showing only 6% in maximal oscillation frequency degradation from its manual counterpart, verifying the methodology from netlist to silicon.